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1992-12-09
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From comp.sys.amiga.hardware Thu Dec 10 20:36:34 1992
Path: omega!my!lunic!sunic!mcsun!uunet!zaphod.mps.ohio-state.edu!caen!destroyer!cs.ubc.ca!news.UVic.CA!amusers.UUCP!Rick_Lang
From: Rick_Lang@amusers.UUCP (Rick Lang)
Newsgroups: comp.sys.amiga.hardware
Subject: WOC Toronto 9212 update
Message-ID: <Rick_Lang.00pp@amusers.UUCP>
Date: 9 Dec 92 15:53:02 GMT
Organization: AmUsers - The Amiga Users Group of Victoria BC
Lines: 97
World of Commodore December '92, Toronto. This article is a synopsis of a
recording of remarks made to dealers at the WOC show in Toronto by Lewis
Eggebrecht, VP Engineering, Commodore. Many of Lew's comments were
similar to his September address at WOC Pasadena; I have only included a
portion of his remarks and tried to eliminate the duplication except
where required for clarity.
Thank you to Bradley DuTemple for making the trip from Victoria to
Toronto and providing me with a tape of Lew's address.
ENGINEERING'S MISSION
The goal of Commodore Engineering is to enhance and extend the Amiga
architecture by adding new features and increasing performance. New
procedures have been put in place enabling Commodore to design and build
new products quickly; for example, the manufacturing facility in the
Phillipines was built in only one year. Other foundries are used to
build components designed by Commodore; for example, the new Lisa chip
was made by HP.
Much of the focus in engineering is directed to improvements to the
custom chips that make the Amiga unique. The next generation chips are
referred to as either the low end or high end chips.
LOW END CHIP SET
The low end chips represent an incremental improvement of the AGA chips:
- 2 chips about 100 K transistors each
- synchronous design architecture, 57 mHz clock
- supports 32 bit video random access memory (VRAM)
- supports 68020, 68030, 68040 and 68060 processors
- 4 megabit/sec serial data processing
- cyclical redundancy checking (CRC) in hardware
- supports 4 megabyte floppy disks (2.88 MB formatted)
- 24 bit true colour
- chunky pixels
- 2x blitter versus current ECS or AGA
- 8x memory bandwidth of current systems
- up to 8 megabytes of CHIP RAM
- 800 x 600 x 256 colour "rock steady" screens at 72 Hz
HIGH END CHIP SET
At the increased speed of these surface-mounted chips, the buyer should
think of "system" upgrades rather than "chip" upgrades. The high end
chips represent a complete redesign of the custom chips:
- up to 4 chips and one million transistors
- asynchronous design, modular architecture
- backward compatible except for timing dependent code
- video clock independent of the processor clock
- dual ported VRAM with 32-bit and 64-bit access
- video clock greater than 100 mHz
- 12x to 20x memory bandwidth depending on VRAM speed and VRAM bus width
- 8x performance 32-bit blitter with bit blits and word blits
- 1024 x 1280 (sic) screen resolution
- 2 K by 2 K screens supported with upgrades
- true colour
- 72 Hz dispays
- includes framegrabber
- includes genlock
- high performance general purpose serial port supports CD-ROM
- on demand DMA provides 16-bit audio, more than 100 kHz rates, 8 voices
- compressed video decompressed on the fly for playback from VRAM
PRODUCT PLANS
Commodore is increasing the pace of introducing new products:
- SCSI II 32-bit bus master board, 10 MB transfers, shipping January 93
- DSP on processor board, expect by late spring, details at the Orlando
Developers' Conference in Januay
- CD-ROM will be integrated across product line, A1200 and up
- work in progree to support full motion video
- A4000 Tower and A4000s with 68030 and 68EC030 processors coming
-- AEd V1.37/Eval
-- Via DLG Pro v0.995
-- Rick Lang
Editor of the AmUser News - the Victoria Amiga User Group Newsletter
E-mail replies use rlang@bcsc02.gov.bc.ca - not the address in this
message!